Current practicing IC design engineers with knowledge in Process and Device Physics and at least one year in IC design.
The class is designed for IC designers, especially for analog mixed signal IC designer, to understand the SPICE model from its basic parameters to how they are generated and how to effectively use of SPICE model in simulation. This class covers the models of DIODE, BJT(G/P), MOSFET(BSIM3/4), RESISOR, CAPACITOR and other components. It studies in detail the large signal DC models and charge conservation AC models. In addition it also covers the corner modeling, Monte Carlo modeling and mismatch modeling and the usage in simulation. The topic of QA of the models is included. Thru the intensive review of process and device physics, student will gain better insight into the SPICE models and is enabled for the better IC design.
1.Review of SPICE model Developments 1.0 Overview of CMOS process and device components.1.1 SPICE modeling history and current development in industry.1.2 Overview of current SPICE simulators and simulation flows widely used design community. 2. SPICE model (1): DIODE2.1PN Junction fabrication, Device physics & operation.2.2DIODE Model: DC model and AC model. 2.3DIODE SPICE model parameter extraction and simulation example.3. SPICE model (2): MOSFET3.1MOSFET fabrication, device physics and operation3.2MOSFET Model: DC model and AC charge conservation model 3.3MOSFET noise modeling3.5MOSFET BSIM3/4 SPICE model parameter extraction3.6MOSFET models review: EKV, MOS9, PSP4. SPICE model (3): Bipolar Transistor4.1BJT fabrication, device and operation4.2BJT Model: DC model and AC model4.3BJT Gamma-Poon model parameters extraction and simulation example.5.SPICE model (4): RESISTOR 5.1Resistors fabrication and modeling5.2Review of Well, diffusion, poly, and metal resistors 6. SPICE model (5): CAPACITOR6.1Capacitor fabrication, operation & modeling6.2Review of poly, MIM, MOSFET, Junction and Varactor capacitance7.SPICE model (5): INDUCTOR7.1Inductor fabrication, operation and modeling8.Effects and Modeling of Process Variation and Device Mismatching8.1Modeling of process variation 8.2Modeling of Device Mismatch9.Quality Assurance of the SPICE models
Education: Ph. D in Electrical Engineering University of Central Florida, USA BSEE & MSEE in Electrical Engineering Mississippi State University, USA Experience: Director of Logic Technology Development in a Foundry Service Manager of RFCD (RF Capability Development) for Intel Corp. USA Sr. Engineer, Analog Circuit Design for Flash Group, Intel Corp. USA. Sr. Engineer, Device Modeling for CTM, Intel Corp. USA. Sr. Engineer, Device Modeling for Mixed Signal Group. Exar Corp. USA Sr. Engineer, Device Modeling for Power Device Group. Siliconix, USA Instructor of E.E. Department for UCF Instructor of FXMC Specializations： 1.Device characterization and model parameter extraction for logic, MS, and RF devices. 2.Analog/MS/RF design flow development and CAD support. 3.Analog circuit design 4.Over 50 technical publications in the area of SPICE modeling, HCI, and design flow development. 5.Hold 1 U. S. patent with 1 US patent and 8 China patents currently under review.
本课程名称：CMOS devices physics and SPICE Modeling for VLSI